Low power 100 MHz all digital delay-locked loop

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1997, Pages 1820-1823

  Kim, Bum Sik ^a   Kim, Lee Sup ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; DELAY CIRCUITS; DIGITAL CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; OPTIMIZATION; SYNCHRONIZATION;

DIGITAL DELAY LOCKED LOOP (DLL); SOFTWARE PACKAGE SPICE;

VLSI CIRCUITS;

EID: 0030648735     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)