Bounds for the number of DC operating points of transistor networks

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1997, Pages 857-860

  Lagarias, Jeffrey C ^a   Trajkovic, Ljiljana ^a  

^a AT AND T LABS RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; MATHEMATICAL MODELS; RESISTORS; SEMICONDUCTOR DIODES;

TRANSISTOR BIASING;

LINEAR NETWORK ANALYSIS;

EID: 0030648318     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)