Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1997, Pages 107-108

  Shimizu, S ^a   Kuroi, T ^a   Sayama, H ^a   Furukawa, A ^a   Nishida, Y ^a   Inoue, Y ^a   Inuishi, M ^a   Nishimura, T ^a  

^a ULSI Lab   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENT MEASUREMENT; ELECTRIC RESISTANCE MEASUREMENT; GATES (TRANSISTOR); GRAIN GROWTH; HOT CARRIERS; OXIDES; SEMICONDUCTOR DOPING; THIN FILMS; VOLTAGE MEASUREMENT;

GATE DEPLETION SUPPRESSION; THRESHOLD VOLTAGE;

CMOS INTEGRATED CIRCUITS;

EID: 0030648253     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)