Repeater design to reduce delay and power in resistive interconnect

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1997, Pages 2148-2151

  Adler, Victor ^a   Friedman, Eby G ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC LOSSES; MATHEMATICAL MODELS; RESISTORS; SHORT CIRCUIT CURRENTS;

PROPAGATION DELAYS; RESISTIVE INTERCONNECTIONS; TRANSITION TIME;

CMOS INTEGRATED CIRCUITS;

EID: 0030647139     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)