BDD based lambda set selection in Roth-Karp decomposition for LUT architecture

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 1997, Pages 259-264

  Jiang, Jie Hong ^a   Jou, Jing Yang ^a   Huang, Juinn Dar ^a   Wei, Jung Shian ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DECISION TABLES; LOGIC GATES; RAPID PROTOTYPING; TABLE LOOKUP;

BINARY DECISIONS DIAGRAM (BDD); CONFIGURABLE LOGIC BLOCKS (CLB); FIELD PROGRAMMABLE GATE ARRAYS (FPGA); ROTH-KARP DECOMPOSITION;

LOGIC CIRCUITS;

EID: 0030645972     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)