Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1997, Pages 261-266

  Variyam, Pramodchandran N ^a   Chatterjee, Abhijit ^a   Nagi, Naveena ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST EFFECTIVENESS; DIGITAL CIRCUITS; PULSE GENERATORS; SHIFT REGISTERS; SYNCHRONIZATION;

BUILT IN SELF TEST (BIST);

ELECTRIC NETWORK ANALYSIS;

EID: 0030645003     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)