VLSI architecture for datapath integration of arithmetic over GF(2m) on digital signal processors

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 1, Issue , 1997, Pages 631-634

  Drescher, Wolfram ^a   Bachmann, Kay ^a   Fettweis, Gerhard ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODING ERRORS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; ERROR CORRECTION;

DATAPATH INTEGRATION; FINITE FIELD ARITHMETIC;

VLSI CIRCUITS;

EID: 0030643226     PISSN: 07367791     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)