240nm Pitch 4GDRAM Array MOSFET Technologies with X-ray Lithography

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1996, Pages 601-604

  Sunouchi, K ^a   Kawaguchiya, H ^a   Matsuda, S ^a   Nomura, H ^a   Shino, T ^a   Murooka, K ^a   Sugihara, S ^a   Mitsui, S ^a   Kondo, K ^a   Kikuchi, Y ^a   Deguchi, K ^b   Fukuda, M ^b   Oda, M ^b   Uchiyama, S ^b   Suzuki, M ^b   Watanabe, T ^b   Yamada, K ^b  

^a TOSHIBA CORPORATION   (Japan)

^b NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON BEAM LITHOGRAPHY; X RAY LITHOGRAPHY; DIFFUSION; GATES (TRANSISTOR); MASKS; MOSFET DEVICES; PHOSPHORUS; RANDOM ACCESS STORAGE; SEMICONDUCTING SILICON; SYNCHROTRON RADIATION;

ACTIVE AREA; CELL-SIZE; LINE-AND-SPACE; MOSFETS; P-DIFFUSION; POLY SILICON; SELF ALIGNED CONTACTS; SHALLOW-JUNCTIONS; TRENCH ISOLATION; ULTRA-FINES;

MOSFET DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE;

DYNAMIC RANDOM ACCESS MEMORIES; GATE SPACE; PITCH ARRAY MOSFET TECHNOLOGY; SHALLOW JUNCTION; SHALLOW TRENCH ISOLATION; ULTRA FINE PATTERNING;

EID: 0030422231     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.1996.554055     Document Type: Conference Paper

References (5)

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5. S.lshihara, et al., Microelectronic Engineering, 14(1991) 141.