Towards an effective IDDQ test vector selection and application methodology

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 491-500

  van Sas, Jos ^a   Swerts, Urbain ^a   Darquennes, Marc ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CORRELATION METHODS; COST EFFECTIVENESS; ELECTRIC FAULT CURRENTS; PRINTED CIRCUIT BOARDS; VLSI CIRCUITS;

PARAMETRIC MEASUREMENT UNIT (PMU); TEST VECTORS;

INTEGRATED CIRCUIT TESTING;

EID: 0030421840     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (26)