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Volumn , Issue , 1996, Pages 68-76
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Trade-offs between yield and reliability enhancement
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED LOGIC DESIGN;
COST EFFECTIVENESS;
CROSSTALK;
INTEGRATED CIRCUIT LAYOUT;
PARAMETER ESTIMATION;
RELIABILITY;
INTEGRATED CIRCUIT CROSSTALK MINIMIZATION;
VLSI CIRCUITS;
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EID: 0030420052
PISSN: 10636722
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (3)
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References (16)
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