Low power mapping of behavioral arrays to multiple memories

IEEE Symposium on Low Power Electronics

Volumn , Issue , 1996, Pages 289-292

  Panda, Preeti Ranjan ^a   Dutt, Nikil D ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAPACITANCE; DATA PROCESSING; DATA STORAGE EQUIPMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; ENERGY DISSIPATION; MATHEMATICAL TECHNIQUES; OPTIMIZATION; POWER AMPLIFIERS;

DATA ARRAYS; LOW POWER MAPPING; OFF CHIP MEMORIES; SWITCHING ACTIVITY; TRANSITION COUNT MINIMIZATION;

POWER ELECTRONICS;

EID: 0030418907     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)