General approach in system design integrating reconfigurable accelerators

Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon

Volumn , Issue , 1996, Pages 16-25

  Hartenstein, R W ^a   Becker, J ^a   Herz, M ^a   Nageldinger, U ^a  

^a University of Koblenz Landau   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CONFIGURABLE ARITHMETIC LOGIC UNIT BLOCKS (CABS); FIELD PROGRAMMABLE DATA PATH ARRAY; RECONFIGURABLE DATA PATH ARRAY;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER CIRCUITS; DIGITAL INTEGRATED CIRCUITS; LOGIC GATES; MICROELECTRONIC PROCESSING; PARALLEL PROCESSING SYSTEMS; RAPID PROTOTYPING;

MICROPROCESSOR CHIPS;

EID: 0030416290     PISSN: 10632204     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICISS.1996.552407     Document Type: Conference Paper

References (76)