3-D effect of cell designs on the breakdown voltage of power SOI-LDMOS

IEEE International SOI Conference

Volumn , Issue , 1996, Pages 134-135

  Suzuki, Yuji ^a   Kishida, Takashi ^a   Takano, Hitomichi ^a   Shirai, Yoshifumi ^a   Suzumura, Masahiko ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN OF SOLIDS; OPTIMIZATION; SILICON ON INSULATOR TECHNOLOGY;

DRAIN CURVATURE RADIUS; SOURCE CURVATURE RADIUS;

MOSFET DEVICES;

EID: 0030415873     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)