![]() |
Volumn , Issue , 1996, Pages 148-156
|
SOP: A reconfigurable massively parallel system and its control-data-flow based compiling method
a
a
NEC CORPORATION
(Japan)
|
Author keywords
[No Author keywords available]
|
Indexed keywords
CELLULAR ARRAYS;
COMPUTER PROGRAMMING LANGUAGES;
DATA HANDLING;
DATA STORAGE EQUIPMENT;
DATA STRUCTURES;
DIGITAL ARITHMETIC;
LOGIC CIRCUITS;
PARALLEL ALGORITHMS;
PROGRAM COMPILERS;
SWITCHING FUNCTIONS;
CONTROL DATA FLOW;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
GLOBAL SEARCH;
GLOBAL SORTING;
HEAP TREE;
SEA OF PROCESSORS (SOP);
PARALLEL PROCESSING SYSTEMS;
|
EID: 0030414050
PISSN: 10823409
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/fpga.1996.564793 Document Type: Conference Paper |
Times cited : (7)
|
References (11)
|