Persistent rescheduled-page cache for low overhead object code compatibility in VLIW architectures

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1996, Pages 4-13

  Conte, Thomas M ^a   Sathaye, Sumedh W ^a   Banerjia, Sanjeev ^a  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; COMPUTER SOFTWARE; STORAGE ALLOCATION (COMPUTER);

DYNAMIC RESCHEDULING; OBJECT CODE COMPATIBILITY; PERSISTENT RESCHEDULED PAGE CACHE (PRC); VERY LONG INSTRUCTION WORD (VLIW) ARCHITECTURES;

MICROCOMPUTERS;

EID: 0030413944     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (24)