Slip defect generation on GaAs wafers during high temperature process: a thermoelastic study from a crystallographic viewpoint

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Volumn , Issue , 1996, Pages 50-53

  Sawada, S ^a   Yoshida, H ^a   Kiyama, M ^a   Mukai, H ^a   Nakai, R ^a   Takebe, T ^a   Tatsumi, M ^a   Kaji, M ^a   Fujita, K ^a  

^a SUMITOMO ELECTRIC INDUSTRIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CRYSTALLOGRAPHY; HEAT TRANSFER; HIGH TEMPERATURE OPERATIONS; MOLECULAR BEAM EPITAXY; SEMICONDUCTOR DEVICE MANUFACTURE; THERMAL STRESS; THERMOELASTICITY;

HEAT FLOW SIMULATION; SLIP DEFECT GENERATION; THERMOELASTIC ANALYSIS; WAFER HEATING APPARATUS;

SEMICONDUCTING GALLIUM ARSENIDE;

EID: 0030412131     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)