FPGA-based implementation of synchronous Petri Nets

IECON Proceedings (Industrial Electronics Conference)

Volumn 1, Issue , 1996, Pages 469-474

  Chang, Naehyuck ^a   Kwon, Wook Hyun ^a   Park, Jaehyun ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; CONTROL; LOGIC GATES; MAPPING; SUBROUTINES;

CELL COMPLEXITY; CELL USAGE; CELL UTILIZATION; FIELD PROGRAMMABLE GATE ARRAY; HIGH SPEED PARALLEL CONTROL; SPEED INDEX; SYNCHRONOUS PETRI NETS;

PETRI NETS;

EID: 0030411838     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)