On the viability of FPGA-based integrated coprocessors

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1996, Pages 206-215

  Albaharna, Osama T ^a   Cheung, Peter Y K ^a   Clarke, Thomas J ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE ALGORITHMS; DELAY CIRCUITS; DIVIDING CIRCUITS (ARITHMETIC); INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; LOGIC PROGRAMMING; MATHEMATICAL MODELS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED COPROCESSORS; VERY LONG INSTRUCTION WORLD (VLIW) ENGINE;

CELLULAR ARRAYS;

EID: 0030408379     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/fpga.1996.564843     Document Type: Conference Paper

References (16)