Integrating a Misprediction Recovery Cache (MRC) into a superscalar pipeline

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1996, Pages 14-23

  Bondi, James O ^a   Nanda, Ashwini K ^a   Dutta, Simonjit ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER SYSTEM RECOVERY; PIPELINE PROCESSING SYSTEMS;

BRANCH TARGET BUFFER (BTB); MISPREDICTION RECOVERY CACHE (MRC); SUPERSCALAR PIPELINES;

MICROCOMPUTERS;

EID: 0030407614     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)