Test generation for ultra-large circuits using ATPG constraints and test-pattern templates

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 13-20

  Wohl, Peter ^a   Waicukauski, John ^a  

^a Advanced Testing Technologies   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; INTEGRATED CIRCUIT LAYOUT; ULSI CIRCUITS;

AUTOMATIC TEST PATTERN GENERATORS (ATPG); BUS CONTENTION; TEST PATTERN TEMPLATES;

INTEGRATED CIRCUIT TESTING;

EID: 0030402727     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)