Modeling the technology impact on the design of a two-level multicomputer interconnection network

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1996, Pages 165-169

  Cruz Rivera, Jose L ^a   Wills, Scott ^a   Gaylord, Thomas ^a   Glytsis, Elias ^a  

^a UNIVERSITY OF PUERTO RICO   (Puerto Rico)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; ELECTRONICS PACKAGING; MICROPROCESSOR CHIPS; MULTICHIP MODULES; VLSI CIRCUITS;

INTERCHIP COMMUNICATION; INTRACHIP COMMUNICATION;

INTERCONNECTION NETWORKS;

EID: 0030399717     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)