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Volumn , Issue , 1996, Pages 33-38

Layout-driven RTL binding techniques for high-level synthesis

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; LOGIC DESIGN; PERFORMANCE; SCHEDULING;

EID: 0030399298     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (14)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.