ARC - a tool for efficient refinement and equivalence checking for CSP

IEEE International Conference on Algorithms and Architectures for Parallel Processing

Volumn , Issue , 1996, Pages 68-75

  Parashkevov, Atanas N ^a   Yantchev, Jay ^a  

^a UNIVERSITY OF ADELAIDE   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATING SEQUENTIAL PROCESSES; EQUIVALENCE CHECKING; LABELED TRANSITION SYSTEMS; ORDERED BINARY DECISION DIAGRAMS; REFINEMENT; VERIFICATION;

ALGEBRA; ALGORITHMS; COMPUTATIONAL LINGUISTICS; CONCURRENT ENGINEERING; DATA STRUCTURES; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

COMPUTER AIDED SOFTWARE ENGINEERING;

EID: 0030398629     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)