ATPD: An automatic test pattern generator for path delay faults

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 443-452

  Karayiannis, D ^a   Tragoudas, S ^a  

^a SOUTHERN ILLINOIS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; COMPUTER AIDED LOGIC DESIGN; ELECTRIC FAULT CURRENTS; POLYNOMIALS;

AUTOMATIC TEST PATTERN GENERATOR; PATH DELAY FAULTS;

INTEGRATED CIRCUIT TESTING;

EID: 0030398540     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (32)