Enhancing high-level control-flow for improved testability

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1996, Pages 322-328

  Hsu, Frank F ^a   Rudnick, Elizabeth M ^a   Patel, Janak H ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROLLABILITY; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT TESTING;

CONTROL DATA FLOW GRAPHS (CDFG); DESIGN FOR TESTABILITY TECHNIQUES;

VLSI CIRCUITS;

EID: 0030397950     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)