Simultaneously Formed Storage Node Contact and Metal Contact Cell(SSMC) for 1Gb DRAM and Beyond

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1996, Pages 593-596

  Lee, J Y ^a   Kim, K N ^a   Shin, Y C ^a   Lee, K H ^a   Kim, J S ^a   Kim, D H ^a   Park, J W ^a   Lee, J G ^a  

^a Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CELLS; CYTOLOGY; DIELECTRIC MATERIALS; ELECTRIC PROPERTIES; ELECTRIC RESISTANCE; GATES (TRANSISTOR); LITHOGRAPHY; OXIDES; POLISHING; RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE MANUFACTURE;

BIT LINES; CELL OPERATION; CELL STRUCTURE; CONTACT HOLES; CONVENTIONAL CAPACITORS; METAL CONTACTS; PARASITIC RESISTANCES; PROCESS MARGINS; PROCESSING STEPS; STORAGE NODES;

DYNAMIC RANDOM ACCESS STORAGE; CELLULAR ARRAYS;

CAPACITOR OVER HIT LINE; CHEMICAL MECHANICAL POLISHING; DYNAMIC RANDOM ACCESS MEMORIES; EMBEDDED MEMORY LOGIC; INTERLAYER OXIDE; PARASITIC RESISTANCE; STORAGE NODE CONTACT AND METAL CONTACT CELL;

EID: 0030397534     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.1996.554053     Document Type: Conference Paper

References (5)

1. K.P. Lee et al., IEDM, p 907, 1995.
2. J.K. Park et al., IEDM, p 911, 1995.
3. B.H. Roh et al., Intl. Conf. SSDM Proc., p 590, 1995.
4. G.T. Jung et al., Proc. 26th ESSDERC, p 685, 1996
5. J.S. Kim et al., Proc. VMIC 96, p 28, 1996