Scheduling for minimizing the number of memory accesses in low power applications

IEEE Workshop on VLSI Signal Processing, Proceedings

Volumn , Issue , 1996, Pages 169-178

  Saied, R ^a   Chakrabarti, Ch ^a  

^a ARIZONA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; GRAPH THEORY; OPTIMIZATION; RESOURCE ALLOCATION;

MEMORY-INTENSIVE OPERATIONS; POWER CONSUMPTION REDUCTION;

RANDOM ACCESS STORAGE;

EID: 0030395246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)