Test generation for global delay faults

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 433-442

  Luong, G M ^a   Walker, D M H ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CORRELATION METHODS; NONLINEAR PROGRAMMING; PROBLEM SOLVING; SEMICONDUCTOR DEVICE MODELS;

GLOBAL DELAY FAULTS; TEST GENERATION;

INTEGRATED CIRCUIT TESTING;

EID: 0030395005     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (37)