Quantitative analysis of processor - programmable logic interface

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1996, Pages 226-234

  Rajamani, Sriram ^a   Viswanath, Pramod ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; COMPUTER HARDWARE; COMPUTER SIMULATION; DELAY CIRCUITS; INTERFACES (COMPUTER); LOGIC PROGRAMMING; MATHEMATICAL MODELS; REDUCED INSTRUCTION SET COMPUTING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAMMABLE LOGIC INTERFACES;

MICROPROCESSOR CHIPS;

EID: 0030393120     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)