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Volumn , Issue , 1996, Pages 552-555
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On optimal placements of processors in Tori networks
a
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Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC NETWORK TOPOLOGY;
INTERCONNECTION NETWORKS;
OPTIMAL SYSTEMS;
PARALLEL ALGORITHMS;
ROUTING NODES;
TORI NETWORKS;
PARALLEL PROCESSING SYSTEMS;
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EID: 0030392857
PISSN: 10636374
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (10)
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