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Volumn , Issue , 1996, Pages 160-166
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Distributed mixed level logic and fault simulation on the Pentium Pro microprocessor
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER SIMULATION;
DISTRIBUTED COMPUTER SYSTEMS;
ELECTRIC FAULT CURRENTS;
INTEGRATED CIRCUIT LAYOUT;
INTEGRATED CIRCUIT TESTING;
LOGIC DESIGN;
VLSI CIRCUITS;
DISTRIBUTED MIXED LEVEL LOGIC;
GATE LEVEL LOGIC/FAULT SIMULATOR;
RESISTOR TRANSISTOR LOGIC (RTL);
MICROPROCESSOR CHIPS;
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EID: 0030389115
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (2)
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References (14)
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