Real time pipelined system design through simulated annealing

Journal of Systems Architecture

Volumn 42, Issue 6-7 SPEC. ISS., 1996, Pages 465-475

  Coli, M ^a,c   Palazzari, P ^b  

^a SAPIENZA UNIVERSITY OF ROME   (Italy)

^b ENEA C R CASACCIA   (Italy)

^c Electronic Engineering Department   (Italy)

Author keywords

Allocation table; Pipeline system; Real time; Simulated annealing

Indexed keywords

ALGORITHMS; CONFORMAL MAPPING; CONSTRAINT THEORY; GRAPH THEORY; PIPELINE PROCESSING SYSTEMS; SIMULATED ANNEALING; SYSTEMS ANALYSIS;

ALLOCATION TABLE; CONTROL DATA FLOW GRAPH;

REAL TIME SYSTEMS;

EID: 0030388836     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(96)00034-3     Document Type: Article

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