Hierarchical functional structuring and partitioning approach for multiple-FPGA implementations

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1996, Pages 638-643

  Fang, Wen Jong ^a   Wu, Allen C H ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; ELECTRIC NETWORK SYNTHESIS; HIERARCHICAL SYSTEMS; LOGIC GATES;

MULTIPLE FIELD PROGRAMMABLE GATE ARRAYS (FPGA); REGISTER TRANSFER LEVEL (RTL) NETLISTS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0030387967     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)