On cancelling the effects of logic sharing for improved path delay fault stability

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 357-366

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT CURRENTS; LOGIC CIRCUITS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS;

LOGIC SHARING; PATH DELAY FAULT TESTABILITY;

INTEGRATED CIRCUIT TESTING;

EID: 0030386565     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)