Fault location based on circuit partitioning

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1996, Pages 242-247

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; ELECTRIC FAULT CURRENTS; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; SEQUENTIAL CIRCUITS; VECTORS;

CIRCUIT PARTITIONING; CIRCUIT UNDER TEST (CUT); TEST VECTORS;

INTEGRATED CIRCUIT TESTING;

EID: 0030384473     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)