Generation of test cases for hardware design verification of a super-scalar fetch processor

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 904-913

  Pomeranz, Irith ^a   Saxena, Nirmal R ^a   Reeve, Richard ^a   Kulkarni, Paritosh ^a   Li, Yan A ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; ERROR ANALYSIS; INTEGRATED CIRCUIT TESTING;

FETCH PROCESSOR; HARDWARE DESIGN VERIFICATION; NONFUNCTIONAL ERRORS;

MICROPROCESSOR CHIPS;

EID: 0030383963     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (32)