3.3V-70MHz low power 8 bit CMOS digital to analog converter with two-stage current cell matrix structure

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 1996, Pages 197-200

  Kim, Ji Hyun ^a   Yoon, Kwang Sub ^a  

^a Inha University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DECODING; DIGITAL TO ANALOG CONVERSION; ELECTRIC CURRENTS; ELECTRIC POWER SUPPLIES TO APPARATUS; LOGIC CIRCUITS; RESISTORS;

POWER DISSIPATION; TWO STAGE CURRENT CELL MATRIX ARCHITECTURE;

CMOS INTEGRATED CIRCUITS;

EID: 0030376055     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)