Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 1996, Pages 904-907

  Papananos, Y ^a   Tsividis, Y ^a  

^a NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FEEDBACK AMPLIFIERS; GAIN CONTROL; VLSI CIRCUITS;

DUAL COMMON MODE FEEDBACK LOOP; SINGLE COMMON MODE FEEDBACK LOOP;

OPERATIONAL AMPLIFIERS;

EID: 0030362418     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)