Modified probabilistic neural network hardware implementation schemes

IEEE Region 10 Annual International Conference, Proceedings/TENCON

Volumn 1, Issue , 1996, Pages 167-172

  Zaknich, Anthony ^a   Attikiouzel, Yianni ^a  

^a UNIVERSITY OF WESTERN AUSTRALIA   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; INTEGRATED CIRCUIT LAYOUT; OPTOELECTRONIC DEVICES; PARALLEL PROCESSING SYSTEMS; PROBABILITY; REGRESSION ANALYSIS; TIME SERIES ANALYSIS; VIRTUAL REALITY; VLSI CIRCUITS;

MODIFIED PROBABILISTIC NEURAL NETWORKS (MPNN);

NEURAL NETWORKS;

EID: 0030314343     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)