Low-temperature and low thermal budget fabrication of polycrystalline silicon thin-film transistors

IEEE Electron Device Letters

Volumn 17, Issue 11, 1996, Pages 503-505

  Lin, Hsiao Yi ^a,b   Chang, Chun Yen ^a,b   Lei, Tan Fu ^b   Liu, Feng Ming ^c   Yang, Wen Luh ^c   Cheng, Juing Yi ^b   Tseng, Hua Chou ^b   Chen, Liang Po ^d  

^a IEEE

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c FENG CHIA UNIVERSITY   (Taiwan)

^d NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

AMMONIA; CHEMICAL POLISHING; CHEMICAL VAPOR DEPOSITION; CRYSTALLIZATION; ELECTRIC CURRENTS; GLASS; PLASMAS; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR GROWTH; SILICON WAFERS; SUBSTRATES;

CHEMICAL MECHANICAL POLISHING; LARGE AREA DISPLAY PERIPHERAL DRIVER CIRCUITS; SOLID PHASE CRYSTALLIZATION; TETRAETHYLORTHOSILICATE OXIDE; ULTRAHIGH VACUUM CHEMICAL VAPOR DEPOSITION;

THIN FILM TRANSISTORS;

EID: 0030290018     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.541762     Document Type: Article

References (11)

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