Design and analysis of an optimal instruction-retry policy for TMR controller computers

IEEE Transactions on Computers

Volumn 45, Issue 11, 1996, Pages 1217-1225

  Kim, Hagbae ^a,b   Shin, Kang G ^a,c  

^a IEEE

^b Yonsei University   (South Korea)

^c UNIVERSITY OF MICHIGAN   (United States)

Author keywords

Common cause faults; Controller computer; Dynamic failure; Hard deadlines; Internal and external faults; Real time control systems; Reconfiguration; Retry; TMR failures and masked errors

Indexed keywords

COMPUTER CONTROL; COMPUTER SYSTEM RECOVERY; OPTIMAL CONTROL SYSTEMS; PROBABILITY; REAL TIME SYSTEMS;

COMMON CAUSE FAULTS; DYNAMIC FAILURE; HARD DEADLINES; MASKED ERRORS; OPTIMAL INSTRUCTION RETRY POLICY; REAL TIME CONTROL SYSTEMS; TRIPLE MODULAR REDUNDANT (TMR) CONTROLLER COMPUTERS;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0030289657     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.544478     Document Type: Article

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