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Japanese Journal of Applied Physics, Part 2: Letters

Volumn 35, Issue 11 PART A, 1996, Pages

Negative conductance properties in extremely thin Silicon-On-Insulator (SOI) insulated-gate pn-junction devices (SOI surface tunnel transistors)

(1) Omura, Yasuhisa a

a NTT CORPORATION (Japan)

Author keywords

Confinement; Negative conductance; pn junction; SOI; Tunneling

Indexed keywords

ION IMPLANTATION; NEGATIVE RESISTANCE; OXYGEN; SEMICONDUCTOR INSULATOR BOUNDARIES; SEMICONDUCTOR JUNCTIONS; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES; THERMAL EFFECTS; THERMOOXIDATION; THICKNESS MEASUREMENT;

SEPARATION BY IMPLANTED OXYGEN (SIMOX) SUBSTRATES; SURFACE TUNNEL TRANSISTORS;

TRANSISTORS;

EID: 0030287254 PISSN: 00214922 EISSN: None Source Type: Journal
DOI: 10.1143/jjap.35.l1401 Document Type: Article

Times cited : (21)

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