Built-in self-test for folded bit-line Mbit DRAMs

Integration, the VLSI Journal

Volumn 21, Issue 1-2, 1996, Pages 95-112

  Gizdarski, Emil ^a  

^a UNIVERSITY OF RUSE   (Bulgaria)

Author keywords

Built in self test; Pattern sensitive faults; RAM testing

Indexed keywords

ALGORITHMS; ELECTRIC FAULT LOCATION; PERFORMANCE; TEST FACILITIES; TESTING; VLSI CIRCUITS;

PATTERN SENSITIVE FAULTS;

RANDOM ACCESS STORAGE;

EID: 0030285233     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9260(96)00007-7     Document Type: Article

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