Rapid failure analysis using contamination-defect-fault (CDF) simulation

IEEE Transactions on Semiconductor Manufacturing

Volumn 9, Issue 4, 1996, Pages 518-526

  Khare, Jitendra ^b   Maly, Wojciech ^a,b  

^a IEEE

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CONTAMINATION; COSTS; DEFECTS; FAILURE ANALYSIS; MONTE CARLO METHODS; TRANSISTORS;

CIRCUIT LEVEL FAULTS; CONTAMINATION DEFECT FAULT; YIELD LOSS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0030284911     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.542167     Document Type: Article

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