In-line defect sampling methodology in yield management: An integrated framework

IEEE Transactions on Semiconductor Manufacturing

Volumn 9, Issue 4, 1996, Pages 506-517

  Nurani, Raman K ^b,c   Akella, Ram ^a,d,e   Strojwas, Andrzej J ^a,c  

^a IEEE

^b KLA TENCOR CORPORATION   (United States)

^c CARNEGIE MELLON UNIVERSITY   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

^e STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST EFFECTIVENESS; DATA PROCESSING; DEFECTS; INSPECTION; INSPECTION EQUIPMENT; MATHEMATICAL MODELS; OPTIMIZATION; SAMPLING;

DECLUSTERING; DEFECT SAMPLING; IN LINE DEFECT; WAFER INSPECTION; YIELD MANAGEMENT;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0030284260     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.542166     Document Type: Article

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