Optimizing polysilicon thin-film transistor performance with chemical-mechanical polishing and hydrogenation

IEEE Electron Device Letters

Volumn 17, Issue 11, 1996, Pages 518-520

  Chan, Alice B Y ^b   Nguyen, Cuong T ^a,b   Ko, Ping K ^a,b   Wong, Man ^a,b   Kumar, Anish ^a,b   Sin, Johnny ^a,b   Wong, S Simon ^b  

^a IEEE

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS SILICON; ATOMIC FORCE MICROSCOPY; CHEMICAL POLISHING; ELECTRIC PROPERTIES; GRAIN BOUNDARIES; HYDROGENATION; ION IMPLANTATION; MORPHOLOGY; PASSIVATION; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; SURFACE ROUGHNESS;

CHEMICAL MECHANICAL POLISHING; GATE OXIDE DEPOSITION; METALLIZATION; MULTILEVEL INTERCONNECT PLANARIZATION;

THIN FILM TRANSISTORS;

EID: 0030283641     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.541767     Document Type: Article

References (6)

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2. S. P. Murarka, J. Steigerwald, and R. J. Gutmann, "Inlaid copper multilevel interconnections using planarization by chemical-mechanical polishing," MRS Bulletin, pp. 46-51, 1993.
3. 2 gate insulator," IEEE Trans. Electron Devices, vol. 41, no. 2, pp. 173-179, 1994.
4. T. Noguchi, H. Hayashi, and T. Oshshima, "Low temperature polysilicon super-thin-film transistor (LSFT)," Jpn. J. Appl. Phys., vol. 25, no. 2, p. L121, 1986.
5. C. A. Dimitriadis, P. A. Coxon, L. Papadimitriou, and N. Economou, "Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures," IEEE Trans. Electron Devices, vol. 39, no. 3, pp. 598, 1992.
6. H. N. Chern, C. L. Lee, and T. F. Lei, "Improvement of polysilicon oxide characteristics by fluorine incorporation," IEEE Electron Device Lett., vol. 15, no. 5, 1994.