The isocurrent test: A promising tool for wafer-level evaluation of the interconnect reliability

Microelectronics Reliability

Volumn 36, Issue 11-12 SPEC. ISS., 1996, Pages 1847-1850

  Witvrouw, A ^a   Van Dooren, S ^a   Wouters, D ^a   Van Dievel, M ^a   Maex, K ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM ALLOYS; ELECTRIC VARIABLES MEASUREMENT; ELECTROMIGRATION; INTEGRATED CIRCUIT TESTING; PASSIVATION; RELIABILITY; RESISTORS; THERMAL GRADIENTS; THERMAL STRESS; COPPER ALLOYS; ELECTRIC CURRENTS; FAILURE ANALYSIS; INTERCONNECTION NETWORKS; WSI CIRCUITS;

ISOCURRENT TEST; STRESS INDUCED VOID FORMATION; WAFER LEVEL RELIABILITY TESTING; LOG NORMAL FAILURE DISTRIBUTIONS;

WSI CIRCUITS; INTEGRATED CIRCUIT TESTING;

EID: 0030274028     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/0026-2714(96)00212-0     Document Type: Article

References (8)

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