SCOPUS 정보 검색 플랫폼

Microelectronics Reliability

Volumn 36, Issue 11-12 SPEC. ISS., 1996, Pages 1735-1738

Turn-on speed of grounded gate NMOS ESD protection transistors

(4) Meneghesso, G a Luchies, J R M b Kuper, F G b Mouthaan, A J c

a UNIVERSITY OF PADOVA (Italy)

b NXP SEMICONDUCTORS (Netherlands)

c UNIVERSITY OF TWENTE (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SOFTWARE; ELECTRIC DISCHARGES; ELECTRIC EQUIPMENT PROTECTION; ELECTRIC GROUNDING; ELECTROSTATICS; MOS DEVICES; SEMICONDUCTOR DEVICE TESTING; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; SEMICONDUCTOR DEVICE MODELS;

CHARGED DEVICE MODEL (CDM); ELECTROSTATIC DISCHARGES (ESD) PROTECTION; SOFTWARE PACKAGE SPICE; TURN ON SPEED; ELECTROSTATIC DISCHARGE (ESD) PROTECTION;

GATES (TRANSISTOR); MOSFET DEVICES;

EID: 0030273998 PISSN: 00262714 EISSN: None Source Type: Journal
DOI: 10.1016/0026-2714(96)00186-2 Document Type: Article

Times cited : (11)

References (7)

1
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- EOS/ESD-S5.1-1993, EOS/ESD Ass. Inc., USA
- Draft standard for Electrostatic Discharge (ESD) Sensitivity testing, Charged Device Model (CDM) Component testing, EOS/ESD-S5.1-1993, EOS/ESD Ass. Inc., USA.
- Draft Standard for Electrostatic Discharge (ESD) Sensitivity Testing, Charged Device Model (CDM) Component Testing

2
- 0029506125
- Advanced CMOS protection device trigger mechanisms during CDM
- Phoenix, Arizona
- C. Duvvurry, A. Amerasekera, "Advanced CMOS Protection Device Trigger Mechanisms During CDM" EOS/ESD Symposium Proceedings, Phoenix, Arizona, pp. 162-174, 1995
- (1995) EOS/ESD Symposium Proceedings , pp. 162-174
- Duvvurry, C.¹ Amerasekera, A.²

3
- 0028734222
- Fast turn-on of an NMOS eSD protection transistor; measurements and simulation
- Las Vegas, Nevada
- J.R.M. Luchies, J. Verweij, "Fast Turn-On Of An NMOS ESD Protection Transistor; Measurements and Simulation", EOS/ESD Symposium Proceedings, Las Vegas, Nevada, pp-266-272, 1994.
- (1994) EOS/ESD Symposium Proceedings , pp. 266-272
- Luchies, J.R.M.¹ Verweij, J.²

4
- 30244521181
- Tagungsband 3, ESD Forum, Grainau, VP Verlags GmbH Herrenberg
- R. Kropf, C. Russ, R. Kolbinger, H. Gieser, S. Irl, "Zeitaufgelöste Untersuchungen des Snapbackverhaltens eines ESD-Schutztransistors", Tagungsband 3, ESD Forum, Grainau, VP Verlags GmbH Herrenberg, 1993, pp. 19-26.
- (1993) Zeitaufgelöste Untersuchungen des Snapbackverhaltens Eines ESD-Schutztransistors , pp. 19-26
- Kropf, R.¹ Russ, C.² Kolbinger, R.³ Gieser, H.⁴ Irl, S.⁵

5
- 0343367844
- NMOS transistors behaviour under CDM stress conditions and correlation to other ESD models
- K. Verhaeghe, J.M.R. Luchies, C. Russ, G. Groeseneken, F. Kuper, "NMOS transistors behaviour under CDM stress conditions and correlation to other ESD models" Proc. of ESREF, pp.117-125, 1995
- (1995) Proc. of ESREF , pp. 117-125
- Verhaeghe, K.¹ Luchies, J.M.R.² Russ, C.³ Groeseneken, G.⁴ Kuper, F.⁵

6
- 84920730943
- Fast transient ESD simulation of the NMOS protection transistor
- J.R.M. Luchies, K. Verhaege, F.G. Kuper, A.J. Mouthaan, H.C. de Graaff, " Fast transient ESD simulation of the NMOS protection transistor", Proc. of ESREF, pp.307-310, 1995.
- (1995) Proc. of ESREF , pp. 307-310
- Luchies, J.R.M.¹ Verhaege, K.² Kuper, F.G.³ Mouthaan, A.J.⁴ De Graaff, H.C.⁵

7
- 30244574790
- ESSDERC'94, Edinburgh, Scotland
- E. Zanoni, A. Dal Fabbro, L. Vendrame, G. Verzellesi, G,. Meneghesso, P.Pavan, A. Chantre, A Physic-based accurate SPICE model of impact ionization effects in bipolar transistors, ESSDERC'94, Edinburgh, Scotland, pp. 181-184.
- A Physic-based Accurate SPICE Model of Impact Ionization Effects in Bipolar Transistors , pp. 181-184
- Zanoni, E.¹ Dal Fabbro, A.² Vendrame, L.³ Verzellesi, G.⁴ Meneghesso, G.⁵ Pavan, P.⁶ Chantre, A.⁷

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