A 2.4 Gb/s Receiver and a 1 : 16 demultiplexer in one chip using a super self-aligned selectively grown SiGe base (SSSB) bipolar transistor

IEEE Journal of Solid-State Circuits

Volumn 31, Issue 10, 1996, Pages 1451-1456

  Sato, Fumihiko ^a,b,c   Tezuka, Hiroshi ^a,b,d   Soda, Masaaki ^a,d,e   Hashimoto, Takasuke ^a,f   Suzaki, Tetsuyuki ^a,d,g   Tatsumi, Toru ^a,c,h,i   Morikawa, Takenori ^a   Tashiro, Tsutomu ^a  

^a NEC CORPORATION   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^d Institute of Electronics   (Japan)

^e KYUSHU UNIVERSITY   (Japan)

^f UNIVERSITY OF ELECTRO COMMUNICATIONS   (Japan)

^g UNIVERSITY OF TSUKUBA   (Japan)

^h WASEDA UNIVERSITY   (Japan)

ⁱ Microlectron Research Laboratories

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIPOLAR TRANSISTORS; CHEMICAL VAPOR DEPOSITION; DIGITAL CIRCUITS; ELECTRIC PROPERTIES; EPITAXIAL GROWTH; PHASE LOCKED LOOPS; SEMICONDUCTING BORON; SIGNAL RECEIVERS; SILICON ALLOYS; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES;

AUTOMATIC GAIN CONTROL; DEMULTIPLEXER; OPTICAL TERMINAL INTEGRATED CIRCUITS; SELECTIVE EPITAXIAL GROWTH; SYNCHRONOUS DIGITAL HIERARCHY; SYNCHRONOUS OPTICAL NETWORK;

INTEGRATED CIRCUITS;

EID: 0030270725     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.540055     Document Type: Article

References (19)

1. N. Ishihara, S. Fujita, M. Togashi, S. Hino, Y. Arai, N. Tanaka, Y. Kobayashi, and Y. Akazawa, "3.5Gb/s × 4-ch Si bipolar LSI's for optical interconnections," in ISSCC Dig. Tech. Papers, 1995, pp. 34-35.
2. E. Kasper, H. Kibble, H. J. Herzog, and A. Gruhle, "Growth of 100 GHz SiGe-HBT structures," in Extended Abstracts Int. Conf. Solid-State Devices and Materials, 1993, pp. 419-421.
3. max up to 120 GHz," in IEDM Tech. Dig., 1994, pp. 377-380.
4. T SiGe-base heterojunction bipolar technology," in Tech. Dig. Symp. VLSI Technology, 1990, pp. 49-50.
5. T graded-base SiGe HBT's," in 51st Device Res. Conf., 1993, IIA-3 (Abstract: IEEE Trans. Electron Devices, vol. 40, pp. 2100-2101, 1993).
6. T graded-base SiGe HBT's," in 51st Device Res. Conf., 1993, IIA-3 (Abstract: IEEE Trans. Electron Devices, vol. 40, pp. 2100-2101, 1993).
7. M. Soda, H. Tezuka, F. Sato, T. Morikawa, T. Hashimoto, T. Tatsumi, T. Suzaki, and T. Tashiro, "One-chip receiver IC for 2.4 Gb/s optical communication systems," in Proc. Custom Integrated Circuits Conf., 1995, pp. 99-102.
8. T. Hashimoto, H. Tezuka, F. Sato, M. Soda, T. Suzaki, T. Tatsumi, and T. Tashiro, "SiGe bipolar IC's for 20 Gb/s optical transmitter," in Proc. Bipolar/BiCMOS Circuits and Technology Meeting, 1994, pp. 167-171.
9. F. Sato, T. Tatsumi, T. Hashimoto, and T. Tashiro, "A super self-aligned selectively grown SiGe base (SSSB) bipolar transistor fabricated by cold-wall UHV/CVD technology," IEEE Trans. Electron Devices, vol. 41, pp. 1373-1378, 1994.
10. F. Sato, T. Hashimoto, T. Tatsumi, and T. Tashiro, "Sub-20 ps ECL circuits with high-performance super self-aligned selectively grown SiGe base (SSSB) bipolar transistors," IEEE Trans. Electron Devices, vol. 42, pp. 483-488, 1995.
11. F. Sato, T. Hashimoto, T. Tatsumi, M. Soda, H. Tezuka, T. Suzaki, and T. Tashiro, "A self-aligned SiGe base bipolar technology using cold wall UHV/CVD and its application to optical communication IC's," in Proc. Bipolar/BiCMOS Circuits and Technology Meeting, 1995, pp. 82-88.
12. A. Ishizaka and Y. Shiraki, "Low temperature surface cleaning of silicon and its application to silicon MBE," J. Electrochem. Soc., vol. 133, pp. 666-671, 1986.
13. T. Hashimoto, F. Sato, T. Tatsumi, and T. Tashiro, "Boron spike effect on cut-off frequency and Early voltage in SiGe HBT's," in Proc. European Solid State Device Research Conf., 1995, pp. 501-504.
14. B. S. Meyerson, "UHV/CVD growth of Si and Si:Ge alloys: Chemistry, physics, and device applications," Proc. IEEE, vol. 80, pp. 1592-1608, 1992.
15. M. Sugiyama, T. Shimizu, H. Takemura, A. Yoshino, N. Oda, T. Tashiro, Y. Minato, Y. Takahashi, and M. Nakamae, "Bipolar VLSI memory cell technology utilizing BPSG-filled trench isolation," in Tech. Dig. Symp. VLSI Technology, 1989, pp. 59-60.
16. I. Ikushima, K. Nakano, Y. Minai, and S. Yamada, "32 Mb/s integrated dual-in-line packaged fiber optic transmitter and receiver modules," in Proc. GLOBECOM'82, 1982, pp. 339-403.
17. A. Pottbäcker, U. Langmann, and H.-U. Schreiber, "A Si bipolar phase and frequency detector IC for clock extraction up to 8 Gb/s," IEEE J. Solid-State Circuits, vol. 27, pp. 1747-1751, 1992.
18. Z. H. Lao, U. Langmann, J. N. Albers, E. Schlag, and D. Clawin, "Silicon bipolar 1:16-demultiplexer for 10 Gbit/s fiber optic communication system," Electronics Lett., vol. 30, no. 15, pp. 1214-1216, 1994.
19. K. Ueda, N. Sasaki, H. Sato, S. Kubo, and K. Mashiko, "3.0 Gb/s, 272 mW, 8:1 multiplexer and 4.1 Gb/s, 388 mW, 1:8 demultiplexer," in Tech. Dig. Symp. VLSI Circuits, 1994, pp. 123-124.