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Volumn 41, Issue 21, 1996, Pages
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Implementation DSP functions in FPGAs to reduce cost and boost performance
a
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Author keywords
[No Author keywords available]
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Indexed keywords
CONFIGURABLE LOGIC BLOCKS;
DISTRIBUTED ARITHMETIC;
FIELD PROGRAMMABLE GATE ARRAYS;
MEMORY ACCESS;
MULTIPLY AND ACCUMULATE FUNCTIONS;
NOISE CANCELLATION;
SHIFT AND ADD CIRCUITS;
VITERBI DECODER;
ADDERS;
ALGORITHMS;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
BOOLEAN FUNCTIONS;
DIGITAL ARITHMETIC;
DIGITAL FILTERS;
DIGITAL SIGNAL PROCESSING;
LOGIC GATES;
MULTIPLYING CIRCUITS;
RANDOM ACCESS STORAGE;
SHIFT REGISTERS;
SPURIOUS SIGNAL NOISE;
LOGIC CIRCUITS;
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EID: 0030258994
PISSN: 00127515
EISSN: None
Source Type: Trade Journal
DOI: None Document Type: Article |
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Times cited : (1)
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References (3)
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